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Sunday, September 22
 

8:30am CDT

PDC01: Design, Fabrication and Assembly Process Principles for Flexible and Rigid Flex Circuits
PDC01: Design and Assembly Process Principles for High Density Flexible and Rigid Flex Circuits

Vern Solberg, Solberg Technical Consulting
Sunday, September 22 | 8:30am — 12:00pm

Course Objectives
Both uncased active and passive component elements are candidates for embedding but the process of selecting these components must be made early in the design process. Developers have realized that in addition to passive components, embedding one or more active die elements on an inner layer of the circuit in close proximity to pre-packaged semiconductor(s) mounted on the outer surface, electrical interface between components can be minimized, considerably improving functional performance. This closer coupling of key passive and active semiconductor elements will:
• Significantly reduce inductance • Contribute to increasing signal speed • Lower overall power consumption

Some components are easy candidates for integrating into the substrate while others may involve more complex processes and will be difficult to rationalize. And although a majority of the discrete passive and active devices may remain mounted on the outer surfaces of the circuit board, embedding a majority of the resistor functions and one or more silicon-based semiconductor elements within the inner layers of the structure can enable greater utilization of the circuit boards outer surfaces. This half-day course furnishes a comprehensive introduction to IPC-7092, Design and Assembly Process Implementation for Embedded Components.

The material presented has been developed to better enable the product designer and manufacturing specialist to have a clear understanding of the principles for embedding components in an organic multilayer circuit board structure. The course will include design guidelines, material selection and termination methodology for embedding both ‘active and passive components including formed and placed resistor, capacitor and inductor elements. Process variations for embedding and interconnecting thinned semiconductor elements within the multi-layer PCB will be illustrated with examples of both core type and coreless substrate structures.

Topics Covered:
1. Industry drivers for embedded component technology
2. Economic benefits for embedding components • Comparing passive component variations
3. Formed passive component methodology
4. Discrete passive component selection criteria
5. Addressing key factors in planning for ECP
6. Preparation for embedding semiconductors
7. Issues and concerns related to component supply chain
8. Core and coreless embedded component structures
9. Base material selection for the ECP application
10. Embedded component substrate development
11. Land pattern and circuit routing recommendations
12. Component attachment processes
13. Embedded component assembly variations
14. Semiconductor interface variations
15. Qualifying embedded component PCB fabricators

Sunday September 22, 2019 8:30am - 9:30am CDT
Room 53

8:30am CDT

PDC02: Principles and Practice of Developing Soldering Profiles
PDC02: Principles and Practice of Developing Soldering Profiles

*Ray Prasad, Ray Prasad Consultancy Group
Sunday, September 22 | 8:30am — 12:00pm

Course Objectives
This course is based on IPC 7530 Guidelines for Temperature Profiling for Mass Soldering Processes chaired by Ray Prasad. The focus of this course is to focus on dos and dont’s of developing thermal profiles for widely used soldering processes in order to reduce soldering defects and improve quality and reliability.

During soldering it is critical that all solder joints reach the minimum soldering temperature. But what is that minimum temperature and most importantly how do you measure it? And how do make sure that those temperatures remain valid over the life of that product in production. There are many alloys in both tin-lead and lead free including low temperature soldering processes that are being used today and being soldered by various soldering methods. But it is surprising how many companies use incorrect profiles. Even those who may think they are using correct soldering profiles are using wrong profiles since they measure and monitor those profiles incorrectly. Incorrect thermal profiles can damage or warp components and boards. The problem becomes even more complex when you have a board with components of different size and thermal mass and even of different soldering alloy combinations – all on the same board to be soldered at the same time.

Topics Covered
1. An Overview of various soldering process and their Profiles
1.1. Mass Soldering Process (wave and reflow
1.2. Thermal shock Prevention for Wave
1.3. Application Specific Soldering Processes (vapor phase, laser and Selective Soldering)
2. Soldering zones, Profiles and Profilers
3. Super heat, Peak, TAL and True TAL
4. Recommended Profiles for tin lead, lead free and mixed alloys
5. Methods and locations for attaching thermocouples for BGAs – Dos and Donts
6. Monitoring and Controlling Oven Performance
7. Examples of Good and Bad Profiles and related defects
8. Review, Questions and Answers


Sunday September 22, 2019 8:30am - 9:30am CDT
Room 52

8:30am CDT

PDC03: Humidity Robustness of Electronics: How to Tackle? * CANCELLED*
PDC03: Humidity Robustness of Electronics: How to Tackle?

This course has been cancelled

Sunday September 22, 2019 8:30am - 9:30am CDT
Room 51

8:30am CDT

PDC04: Cost Conscious Test Strategies for Electronic Products
PDC04: Cost Conscious Test Strategies for Electronic Products

Robert Hanson, Consultant
Sunday, September 22 | 8:30am — 12:00pm

Course Objectives
This tutorial will focus on the main issues of testing today which consist of (a) disciplines of testing the bareboard, (b) testing on the production line for minimum ppm defects, (c) testing for fault detection/fault isolation on the production line using ICT, flying probe and vision for correcting the processes. Finally, at the system level static and dynamic functional test is performed using embedded firmware, boundary SCAN and functional test equipment. However, the reliability of the end item is predicated on strategic testing of all items that defines the system performance.

Topics Covered
1. Testing at the Printed Circuit Board (PCB) Level
1.1.1. Testing the PCB for opens, shorts, and impedance quality. How PCB testing is conducted: Bed-of-Nails testers, Flying Probe, and Vision. How to test PCBs with small via targets and testing for high-density PCBs like BGA land patterns.
1.1.2. Testing blind and buried vias, how vision is used to test for cracks, barrel deformations and copper fill.
1.1.3. Cost of Test – What are the test cost ratios if the fault is detected at End Item functional versus PCB functions versus PCB production line versus bareboard.
2. Testing on the Production Line
2.1.1. No-clean solder paste and In-Circuit (ICT) bed-of-nails (BON) contamination, vias under components—pros and cons. Purpose of 100% nodal visibility to the bottom of the board. Detection of the fault cause: solder, components, printing, chip shooting, cleaning and the human element-ICT must detect the fault, isolate the fault, and then define the fault cause. Why intelligent ICT is the best SPC tool in the factory; What’s new in wireless fixtures, backdriving, magnetic plate, capacitive plate and reverse diode testing – how they work and what they can do for your company’s ICT test capability.
2.1.2. Bead Probe Technology: The new concept for providing 100% fault detection/fault isolation for high-density PCBs.
2.1.3. Board Contamination: What causes it and what are the effects in electrical degradation, moisture absorption, and corrosive ionics: surface insulation resistance: how to test it, defining acceptable limits; Ionograph testing, copper mirror test, solder mask corrosion test, and solderability tests: what they are and when they should be used.
2.1.4. Vision: Types: Microscope, X-ray, laser, AOI, and laminography. What can they test, where should they be used, and how they can affect ppm defects.
2.1.5. Flying Probe (FP): Speed, accuracy, capabilities, testing BGA, CSP, TAB, FC, and COB using FP.


Sunday September 22, 2019 8:30am - 9:30am CDT
Room 50

1:30pm CDT

PDC05: Stencil Printing – Advanced Topics
PDC05: Stencil Printing – Advanced Topics

*Chrys Shea, Shea Engineering Services
Sunday, September 22 | 1:30pm — 5:00pm

Course Objectives
This advanced course on SMT solder paste stencil printing builds upon the basics to give the attendees a larger toolkit for troubleshooting and process improvement. The session starts with the handling and verification of incoming stencils, and continues with detailed methods of troubleshooting suspected stencil issues, showing images and data from multiple real-world stencil trials. Stencil underwiping is presented, reviewing types of wipe sequences, wiper papers and solvents, particularly as they relate to modern lead-free solder pastes and the preservation of nanocoatings. Videos and ultraviolet images of the effects of cleaning and nanocoatings are shown. The course then moves to automated Solder Paste Inspection (SPI) and discusses basic types of SPI equipment. It continues with tips for production implementation and setting inspection tolerances. It then introduces simple experimental methods that can be performed quickly and easily to improve yields using SPI data. The differences between accuracy and repeatability are discussed, as are the effects of setting of reference planes and measurement thresholds. This year's new updates include results of recent stencil stepping, aperture optimization, nanocoating and miniaturization studies.

Topics Covered
1. Stencil Verification
1.1. SPI verification
1.2. Test coupons
1.3. SEM images
1.4. Cleaning before using
2. Stencil Troubleshooting
2.1. Physical damage
2.2. Foil thickness
2.3. Aperture size
2.4. Aperture location
2.5. Impact on AR & TE
2.6. Cut Quality
3. Underwiping
3.1. Purpose and methods
3.2. UV Test results
3.3. Solvent requirements
3.4. Solvent compatibility with solder pastes
3.5. Solvent and paper compatibility with nanocoatings
4. Automated Solder Paste Inspection (SPI)
4.1. SPI basics
4.2. Production implementation
4.3. Setting inspection tolerances
4.4. Improving print yields
4.5. Accuracy and Repeatability
4.6. Reference planes and measurement thresholds
4.7. Special features to improve performance
5.0 Recent studies
5.1 Step stencil keepout zones
5.2 Getting Cpk >2.0 on 008004's or 0201M's
5.3 Aperture design print repeatability for discretes
5.4 Fresh look and head-to-head comparison of nanocoatings

Sunday September 22, 2019 1:30pm - 5:00pm CDT
Room 51

1:30pm CDT

PDC06: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration
PDC06: Achieving High Reliability for Lead-Free Solder Joints - Materials Consideration

*Ning-Cheng Lee, Ph.D., Indium Corporation
Sunday, September 22 | 1:30pm — 5:00pm

Course Objectives
This course covers the detailed material considerations required for achieving high reliability for lead-free solder joints. The reliability discussed includes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a function of material combination, thermal history, and stress history will be addressed in details, and novel alloys with high reliability and reduced fragility will be presented. Electromigration and tin whisker will also be discussed. The emphasis of this course is placed on the understanding of how the various factors contributing to the failure modes, and how to select proper solder alloys and surface finishes for achieving high reliability.

Topics Covered
1. Prevailing Materials
1.1. Prevailing Solder Alloys
1.2. Prevailing Surface Finishes
2. Surface Finishes Issues
2.1. Issues of ENIG
2.2. Issues of ImAg
3. Mechanical Properties
3.1. Shear & Pull Strength
3.2. Creep
4. Intermetallic Compounds
4.1. Interaction of Cu and Ni
4.2. Effect of Cu Content in SAC
4.3. Effect of Alloy Additives
4.4. Effect of Phase Transition on Intrinsic IMC Cracking
5. Failure Modes
5.1. Grain Boundary Sliding & Cavitation
5.2. Grain Coarsening
5.3. Grain Orientation
5.4. Lead Contamination
5.5. Mixed Alloys
5.6. Effect of Cu Pad Grain Size

Sunday September 22, 2019 1:30pm - 5:00pm CDT
Room 50

1:30pm CDT

PDC07: Embedding Passive and Active Components PCB Design, Fabrication Methodologies and Assembly Process Strategy *Cancelled!*
PDC07: Embedding Passive and Active Components PCB Design, Fabrication Methodologies and Assembly Process Strategy

*This Professional Development Course has been cancelled*


Sunday September 22, 2019 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC08: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World
PDC08: Design and Assembly Process Challenges for Bottom Terminations Components (BTCs) such as QFN, DFN and MLF in Tin-Lead & Lead Free World

*Ray Prasad, Ray Prasad Consultancy Group
Sunday, September 22 | 1:30pm — 5:00pm

Course Objectives
Bottom Termination surface mount Components (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface to surface interconnections. BTCs are like BGAs which also have hidden terminations, but they are also very different. BTCs do not have spheres but rather metallized terminations or pads underneath the package. This minor difference in the physical I/O shape makes all the difference in design, assembly and rework between BTCs and BGAs.

Since there are no leads or balls in BTCs to take up any slack from package or board warpage, you essentially need perfection in design and assembly process. When was the last time you saw every thing perfect on any manufacturing floor?

One must also keep in mind that these parts are not the only components that must be mounted on the board. Look at any board. It will have other packages such as BGAs, fine pitch and even some through-hole components; and those components have their own unique design and assembly implementation requirements. So designing for BTCs may involve trial and error and lot of frustration by many companies. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead Free has compounded the designer’s task.

When it comes to inspection, BTCs pose even more challenge than BGAs. What you may see in visual inspection may look bad but may really be acceptable. And what you don’t or can’t see may really be critical. And the fact that the Process Engineer must worry about both too much solder and too little solder on the same BTC package makes the quality engineer nervous about field returns.

The objective of the course is to get away from the trial and error approach and provide you successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes.

This course is based on Surface Mount Technology: Principles by Ray Prasad and Practice and IPC 7093 Design and Assembly Process Guidelines for BTCs also co-chaired Ray. This course identifies many of the characteristics that influence the successful implementation of robust and reliable BTC assembly processes.

This is not a theoretical course. It s based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients and deals with "real-world" problems in lead free and tin-lead BTC implementation.


Topics Covered
1. Introduction
1.1. Pros and Cons of BTC
1.2. Pull Back Vs Non Pull Back
1.3. BTC Package Manufacturing Process
2. Major Design Considerations for BTCs
2.1. Laminates and Surface Finish Considerations
2.2. Land Pattern and Stencil Design Guidelines
2.3. Component considerations
3. Assembly Process Guidelines for BTC
3.1. Solder Paste Printing- the Key Process Step
3.2. Reflow Process Guidelines
3.3. BTC Solder Joint Quality Requirements
3.4. BTC Rework Process
4. Key strategies in design and manufacturing processes to prevent field returns

Sunday September 22, 2019 1:30pm - 5:00pm CDT
Room 53
 
Monday, September 23
 

8:30am CDT

INS1:New Inspection Technologies Towards Industry 4.0
Chair: *Bill Cardoso, Ph.D., Creative Electron
Co-Chair: *Debbie Carboni, KYZEN Corporation

>>How X-Ray Technology is Improving the Electronics Assembly Process
Carlos Valenzuela, Creative Electron, Inc.

>>The Impact of Smart Factory Solutions on PCB Manufacturing
Nicholas Fieldhouse, Omron

>>Smart Inspection Methods in the Electronics Industry
*Ragnar Vaga, YXLON International GmbH

>>Test Methodology for Printed FSR's
Edward Collins, Jabil (MT&I) Manufacturing Technology & Innovation Group

Monday September 23, 2019 8:30am - 9:30am CDT
Room 48

8:30am CDT

HE1: Understanding PCBA Ionic Contamination and Corrosive Mitigation Practices for Increased Survivability in Corrosive Environments
Chair: *Sa'd Hamasha, Ph.D., Auburn University
Co-Chair: *Dwight Howard, APTIV

>>PCBA Cleanliness as a Means to Improve Humidity Robustness of Electronics
*Rajan Ambat, Ph.D., Kamila Piotrowska, Ph.D.,Technical University of Denmark

>>Origin of Ionic Contamination in Automotive Electronics Case Study
*Maurice Dore, Valeo

>>Elimination of “Nickel Corrosion” in ENIG and ENEPIG by using “Reduction Assisted Immersion Gold” in place of “Standard Immersion Gold”
*George Milad, Jon Bengston and Albin Gruenwald, Uyemura International Corporation

>>Ultrathin and High Temperature Conformal Coatings for Corrosive Resistance of Electronics
*Rakesh Kumar, Ph.D., Specialty Coating Systems, Inc

Monday September 23, 2019 8:30am - 10:30am CDT
Room 47/49

8:30am CDT

PDC09: Solder Joint Reliability – Principles and Practice
PDC09: Solder Joint Reliability – Principles and Practice

*Jennie Hwang, Ph.D., H-Technologies Group
Monday, September 23 | 8:30am — 12:00pm


Course Objectives
The course emphasizes on practical, working knowledge, yet balanced and substantiated with science by outlining the critical “players” of solder joint reliability (e.g., manufacturing process, PCB/component coating surface finish, solder alloys), and the solder joint reliability fundamentals in fatigue and creep damage mechanisms via ductile, brittle, ductile-brittle fracture. Likely solder joint failure modes of interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced and surface cracks will be illustrated. To withstand harsh environments, the strengthening metallurgy to further increase fatigue resistance and creep resistance, and the power of metallurgy and its ability to anticipate the relative performance will be illustrated by discussing the comparative performance vs. metallurgical phases and microstructure. The question on whether existing life-prediction models can assure reliability will be highlighted. A relative reliability ranking among commercially available solder systems, as well as the scientific, engineering and manufacturing reasons behind the ranking will be outlined. Attendees are encouraged to bring their own selected systems for deliberation.

Topics Covered
1. Premise – critical players, definition of reliability, solder joint thermo-mechanical degradation – fatigue and creep interaction
2. Solder joint failures modes - interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced, surface-crack, and others
3. Solder joint failure mechanisms – ductile, brittle, ductile-brittle transition fracture
4. Solder joint strengthening metallurgy
5. Illustration of microstructure evolution vs. strengthening in Sn Cu+x,y,z and SnAgCu+x,y,z systems
6. Solder joint voids vs. reliability - causes, effects, criteria
7. Solder joint surface-crack –causes, effects
8. Distinctions and commonalties between Pb-free and SnPb solder joints
9. Thermal cycling conditions - effects on test results and test results interpretation
10. Testing solder joint reliability – discriminating tests and discerning parameters
11. Life-prediction model vs. reliability
12. Solder joint performance in harsh environments
13. What solder alloys are on the horizon and what impact will be on reliability
14. Best practices and competitive manufacturing
15. Ultimate reliability

Monday September 23, 2019 8:30am - 12:00pm CDT
Room 51

8:30am CDT

PDC10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle
PDC10: Solder Paste Qualification Using the SMTA Miniaturization Test Vehicle

*Chrys Shea, Shea Engineering Services
Monday, September 23 | 8:30am — 12:00pm

Course Objectives
This half-day workshop focuses on solder paste and how to select the best one for an operation using the new SMTA Miniaturization Test Vehicle. Solder pastes have over 20 individual characteristics that must be considered during the selection process. Moreover, some characteristics conflict with each other and the tradeoffs must be carefully considered when determining the best process chemistry in order to avoid surprises on the production line. Many operations delay updating their soldering materials because of the high cost, lost production time, and complexity of the materials. These concerns have been met with a low-cost evaluation kit that minimizes line time, maximizes test efficiency, and demonstrates the tradeoffs in performance characteristics. The kit includes pre-designed PCB boards and components; an active spreadsheet to configure the PCB population, cost and sample sizes; stencil and vacuum board support designs; ODB++ database; placement files; SPI files; step-by-step directions for a 30-print DOE; an SMT soldering reference manual; directions for statistical reduction; and the customizable Score Card, which helps assemblers understand the tradeoffs involved and chose the best possible product. The hardware for the kit is available for purchase from commercial suppliers; the documentation and user files are available for FREE download from a website. This course discusses each characteristic of solder paste, how it impacts the SMT process, how the kit tests it, and how and why the board was designed. The Score Card is the key to customizing the test to a specific operation. Attendees will be encouraged to consider the solder paste characteristics on the Score Card as it relates to their SMT operations in an open discussion forum.

Topics Covered
1. Kit Overview
2. Solder Paste Characteristics
2.1. Categories and details
3. PCB Design
3.1. Top Side Elements
3.2. Bottom Side Elements
4. Components
4.1. Size Range
4.2. Cost Range
4.3. Bill of Materials Configurator Spreadsheet
5. Nesting the Tests for Efficiency
5.1. One side sits for abandon test while the other side gets worked in a shear test
6. Test Execution Order
6.1. Top Side
6.2. Bottom Side
6.3. Bottom Side
6.4. Top Side
7. Data Collection and Reduction
7.1. Print
7.2. Reflow
8. Score Card
8.1. Weighting each factor on importance to the specific operation and open discussion
8.2. Ranking each paste’s performance relative to each other
8.3. Category subtotals - Tradeoffs
8.4. Overall score
9. Fatal Flaws
9.1. Graping
9.2. Voiding
9.3. Peaking
9.4. Wipe Sensitivity
9.5. Other
10. Other uses for the SMTA MTV 11. Q&A

Monday September 23, 2019 8:30am - 12:00pm CDT
Room 53

8:30am CDT

PDC11: Printing in the Third Dimension; Design, Materials, Equipment & Applications in Electronics
PDC11: Printing in the Third Dimension; Design, Materials, Equipment
& Applications in Electronics

*Charles Bauer, TechLead Corp
Monday, September 23 | 8:30am — 12:00pm


Course Objectives
Excitement around 3D printing continues full speed ahead whether in electronics, consumer goods or industrial systems. Understanding the capabilities, limitations and most importantly the complexities of 3d printing remains challenging despite significant progress in both equipment and materials. This tutorial on 3D printing introduces the application of 3D printing in and around the world of electronics, whether for prototyping, pilot production or manufacturing.

Beginning with a review of the history of 3D printing/additive manufacturing the tutorial delves into the techniques, materials, equipment and processes for 3-dimensional manufacturing as well as design tools. Continuing with analysis of capabilities and limitations, the tutorial demonstrates the power of additive manufacturing in its roles from prototyping and product development to mass customization and even its role in digital health and human welfare. Specific examples include batteries, shielding, high density capacitors, and simple circuits. Discussion also includes applications outside the electronics world to stimulate creative thought, e.g. jet engine turbines and hyperbolic airfoils.

The tutorial concludes with a review of specific market opportunities and current applications areas showing the greatest promise and growth.


Topics Covered
1. History of 3D Printing & Additive Manufacturing
1.1. Common Perceptions
1.2. Familiar Applications
1.3. Trends & Current Developments
2. 3D Printing Techniques
2.1. Extrusion
2.2. Fusion
2.3. Jetting
2.4. Lamination
2.5. Deposition
2.6. Photopolymerization
3. Design Tools
4. Materials
4.1. Organic
4.2. Inorganic
4.3. Polymeric
4.4. Metallic
5. Equipment
5.1. Types
5.2. Costs
5.3. Footprint
6. Capabilities & Challenges
6.1. Miniaturization & Size
6.2. Combinations & Constructions
6.3. Customization & Performance
6.4. Simplification & Specifications
7. Applications
7.1. Mainstream
7.2. Emerging
7.3. Opportunities
8. Case Studies
8.1. Human Impact
8.2. Digital Health
9. The Future
9.1. Design & Manufacturing Infrastructure
9.2. Business Model Disruption
9.3. Market Creation

Monday September 23, 2019 8:30am - 12:00pm CDT
Room 50

8:30am CDT

PDC12: Defect Analysis and Process Troubleshooting: Part 1
PDC12: Defect Analysis and Process Troubleshooting: Part 1

*Jim Hall & *Phil Zarrow, ITM Consulting
Monday, September 23 | 8:30am — 12:00pm


Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design

Topics Covered
Introduction Prevention: Process Development and Validation Variation (Common Cause) Continuous Improvement Defect Definition Failure Reduced Reliability Process Indicator Special Cause vs. Common Cause Defect Identification Inspection Manual AOI X-Ray Test ICT Functional Contamination False Calls / Escapes Causes of Defects Special Cause vs. Common Cause Variability (repeatability) Accuracy Process not Optimized Root Cause Analysis 5 Whys” Cause and Effect Diagram Process Relationships Incoming Materials Handling Process Problems

Monday September 23, 2019 8:30am - 12:00pm CDT
Room 52

10:30am CDT

INS2: Inspection for Manufacturing Performance Improvement
Chair: *Rob Bougski, Datest Corporation
Co-Chair: *Glen Thomas, Ph.D., Creative Electron, Inc.

>>Micro-Computed Tomography Analysis for Failure Analysis in Electronics
Claire Brennan, Ph.D., Collins Aerospace

>>Improve AOI Performance through Smart Visual Insight Solutions Collaboration
Wayne Zhang, Ph.D., , Ziv Zhao, Ben Wu, Peng Tang,Yan Wang, Marie Cole, Li Qin Shen, Andrew Vogel,
IBM China Procurement Company

>>An Interesting Approach to Yield Improvement
*Keith Bryant, Keith Bryant Consultancy

Monday September 23, 2019 10:30am - 12:00pm CDT
Room 48

11:00am CDT

Microvia Reliability Lab
Chair: Marc Carter, Aeromarc, LLC

OEM/User Updates
Lockheed Martin (Baccam)
Motorola (Magera)

Supplier Updates
Atotech (Johal)
Uyemura (Gudeczeskas/Valentine)
RBP (Carano)

Consortia Test Programs
IMEC/European Space Agency (Martin Cauwe’)
SAIC/DoD “DOTC” Study (Carter)

Monday September 23, 2019 11:00am - 12:00pm CDT
Room 45

11:00am CDT

HE2: Reliability Concerns for Automotive Applications
Chair: *Babak Arfaei, Ph.D., Ford Motor Company
Co-Chair: *Keith Sweatman, Nihon Superior Company, Ltd.

>>Solder-joint Reliability of a 0.65mm Pitch Molded Array Package for Automotive Applications
*Burton Carpenter, Mollie Benson, A. R. Nazmus Sakib, *Andrew Mawer, Paul Galles, Abdullah Fahim, NXP Semiconductors

>>Challenges of Automotive Electronics Miniaturization
*Maurice Dore, Valeo

>> Automotive Harsh Environments and Implications for ADAS and AD Sensors
*Dwight Howard, APTIV

Monday September 23, 2019 11:00am - 12:30pm CDT
Room 47/49

1:30pm CDT

HE3: Improving the Reliability of Lead-free Solder Joints
Chair: *Robert Kinyanjui, Ph.D., John Deere Electronic Solutions, Inc.
Co-Chair: *André Delhaise, Ph.D., Celestica, Inc.

>>Analysis of the Root Cause for Solder Joint Cracking
Chaohui Hu, Weiming Li, P.E., Jianghua Shen, P.E., China CEPREI Laboratory

>>Qualification of High Density Connector Solutions for Military and Avionic Environments
Kimera Cho, Tim Pearson, David Hillman, Ross Wilcoxon, Collins Aerospace

>> Effect of Creep and Fatigue on Individual SAC305 Solder Joint Reliability in Iso-thermal Cycling
Mohammed Abueed, Ph.D., Raed Alathamneh, Sa’d Hamasha, Ph.D., Jeff Suhling, Ph.D., Pradeep Lall, Ph.D., Auburn University

Monday September 23, 2019 1:30pm - 3:00pm CDT
Room 47/49

1:30pm CDT

INS3: New Techniques to Combat Counterfeit Electronics

Chair: *Terry Kocour,
Co-Chair: Marc Carter

>>Can AI Help Us in the Fight Against Counterfeit Components?
*Glen Thomas, Ph.D., Creative Electron, Inc.

>>Using Standards to Increase Productivity While Fighting Counterfeits
*Cameron Shearon, Raytheon Company

>>Challenges in Detection of Assembly Level Counterfeits
*Diganta Das, Ph.D., CALCE/University of Maryland

Monday September 23, 2019 1:30pm - 3:00pm CDT
Room 48

1:30pm CDT

PDC13: Defect Analysis and Process Troubleshooting: Part 2
PDC13: Defect Analysis and Process Troubleshooting: Part 2

*Jim Hall & *Phil Zarrow, ITM Consulting
Monday, September 23 | 1:30am — 5:00pm


Course Objectives
We don’t assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design


Topics Covered
Specific Processes General: wrong process, material, etc. Printing Placement Soldering Singulation Coating Mechanical Assembly Testing Specific Defect Examples and Causes Wrong Part Damaged Parts Shorts Opens Poor Wetting Insufficient Contamination New Specific Defects HiP / NWO Graping Pad Cratering CAF Conclusion Questions

Monday September 23, 2019 1:30pm - 5:00pm CDT
Room 52

1:30pm CDT

PDC14: Design for Excellence: Manufacturing & Reliability Physics
PDC14: Design for Excellence: Manufacturing & Reliability Physics

*Dock Brown, ANSYS
Stephen Golemme, X, the Moonshot Factory

Monday, September 23 | 1:30pm — 5:00pm

Course Objectives
This course is taught by the co-chairs of the IPC DFX Committee which recently released the new IPC-2231 DFX Guideline document. The course will provide an outline of the eight DFX practices with particular emphasis on design for fabrication, assembly, and reliability.

Topics Covered
1. Design for Manufacturing (DFM)
2. Printed Board Design for Fabrication (DFF)
3. Design for Assembly (DFA)
4. Design for Test/Testability (DFT)
5. Design for Cost (DFC)
6. Design for Reliability (DFR)
7. Design for Environment (DFE)
8. Design for Reuse

Monday September 23, 2019 1:30pm - 5:00pm CDT
Room 50

1:30pm CDT

PDC15: Tolerance Mistaken: Impacts of Not Properly Addressing Limitations of Material, Industry Standards and Assembly Process Limitations
PDC15: Tolerance Mistaken: Impacts of Not Properly Addressing Limitations of Material, Industry Standards and Assembly Process Limitations

*Dale Lee, Plexus Corp.
Monday, September 23| 1:30pm — 5:00pm

Course Objectives
Electronic assemblies today are smaller, lighter with increased functionality per unit area and/or volume. The rate of new technology adoption is increasing through develop ever smaller packages with finer lead spacing and substrates with finer lines and spaces. However, design methods, industry standards, materials and manufacturing processes utilized during the product development and production process have not progressed to meet these new demands and thus many of the tolerance margins that were considered insignificant and acceptable in the past are now critical to high yield, reliable products. This presentation will highlight issues with today’s electronic designs and impacts when material limitations, industry standards and assembly tolerances are not adequately address during design, PCB fabrication, assembly and test.

Topics Covered
1. Industry Standards Limitations (IPC/JEDEC)
2. Component Package Technology A. New Packaging Technologies B. Units of Measure (Metric vs Imperial) C. Land Pattern Design
3. PCB Design
A. Laminate Limitations
B. Via hole Closure
C. Copper Etching Effects (pad/trace size)
D. Solder Mask Design
4. Leadless Component Packages (DFN, QFN, LGA, Chip)
A. Solder Mask/Silk Screen
B. Thermal balance
C. Thermal expansion/shrinkage
5. Assembly Technology
A. Material compatibility
B. Tolerances - Assembly/Tooling
C. Clean/No-clean

Monday September 23, 2019 1:30pm - 5:00pm CDT
Room 53

1:30pm CDT

Women's Leadership Program
FREE for all attendees!

LEADERSHIP AND TECHNICAL PRESENTATIONS:
Chair: Priyanka Dobriyal Ph.D., Intel Corporation
Co-Chair: *Jason Keeping, P. Eng., Celestica, Inc.

>>Exciting Times in Packaging
Simanti Lahiri , Intel Corporation

>>Planning for the Future
*Brian Toleno, Ph.D., Microsoft

>>Women Enabling Technologies
Jennifer Bly, Intel Corporation


SPEED MENTORING & TABLE TOPICS:
Chair: *Marie Cole, IBM Corporation
Co-Chair: Michelle Ogihara, Seika Machinery, Inc.

Seeking University Graduate Talent and Collaborators for Industrial Research
Hosted by: *Martin Anselm, Ph.D., Rochester Institute of Technology (RIT)

Introverts vs Extroverts
Hosted by: Jennifer Bly, Intel Corporation

Technical vs Management Path
Hosted by: *Srinivas Chada, Stryker

Work Life Balance in a “Just in Time World"
*Debbie Carboni, KYZEN Corporation

How Do You Inspire New Comers Industry, Their Retention and Their Strive to Achieve Higher Success
Hosted by: Simanti Lahiri , Intel Corporation

Accelerating Your Career Path
Hosted by: *Chrys Shea, Shea Engineering Services

Planning for the Future, People and Technology
*Brian Toleno, Ph.D., Microsoft Corporation


Monday September 23, 2019 1:30pm - 5:00pm CDT
Room 34

3:30pm CDT

INS4: Inspection Methods for Long Term Assembly Reliability
Chair: *Keith Bryant, Keith Bryant Consultancy
Co-Chair: *Diganta Das, Ph.D., CALCE/University of Maryland

>>Impact of 10-year Room Temperature Aging on the Temperature Cycle Reliability of SAC105
Deng Yun Chen, Subramani Manoharan, Patrick McClusky, Michael Osterman, CALCE/University of Maryland

>>Microstructure and Mechanical Properties of SAC-Bi Solder Alloys with Aging
*Sa'd Hamasha,Ph.D., Mohamed El Amine Belhadi, Raed Al Athamneh, Auburn University;
Luke Wentlent, Ph.D., Universal Instruments Corporation

Monday September 23, 2019 3:30pm - 5:00pm CDT
Room 48

3:30pm CDT

HE4: Progress in Lead-free Solders for Harsh Environment Applications
Chair: *Babak Arfaei, Ph.D., Ford Motor Company
Co-Chair: *Burton Carpenter, Ph.D., NXP Semiconductors

>>Thermal Cycling Reliability of Newly Developed Lead-Free Solders for Harsh Environments
*Sa'd Hamasha, Ph.D., Francy John Akkara, Cong Zhao, Sudan Ahmed, Mohammed Abueed, Sinan Su, Jeffrey Suhling, *Pradeep Lall, Ph.D., Auburn University

>>Evaluation of Tin Whisker Formation on SOT and Discrete Components Assembled with Bismuth-Containing Lead-Free Solder Alloys after High Temperature, High Humidity Storage
*André Delhaise, Ph.D., Celestica, Inc.

>>Influence of a New Abnormal (CuNi)6Sn5 / (NiCu)3Sn4 Layer Growth at Temperatures Above 175°C in
Tin Silver Based Lead-Free Solder Joints
Timo Herberholz, , Robert Bosch GmbH; Andrey Prihodovsky, Ph.D., Deggendorf Institute of Technology; *Mathias Nowottnick, Ph.D., University of Rostock

>>Development of Low Temperature Sn-Bi Based Pb-Free Solder Alloys
*Mehran Maalekian, Ph.D., Aranav Das, Ludo Krassenburg, Co van Veen, Ph.D., Alexander Kodentsov, Ph.D., Mo Biglari, Ph.D., Mat- Tech

Monday September 23, 2019 3:30pm - 5:30pm CDT
Room 47/49

5:00pm CDT

Women’s Leadership Connection Reception
Hosted By: Michelle Ogihara, Seika Machinery, Inc. & Sherry Stepp, KYZEN Corporation

FREE for all attendees!

Join your colleagues after the Women’s Leadership Program at our annual
Connection Reception with wine and appetizers from 5:00pm - 6:00pm.





Monday September 23, 2019 5:00pm - 6:00pm CDT
Room 34
 
Tuesday, September 24
 

8:00am CDT

Tuesday Keynote Session and SMTA Annual Meeting

Tuesday, September 24 | 8:00am

FREE to All Attendees!

The Right Kind of Crazy: A True Story of Teamwork, Leadership and High Stakes Innovation
With a rich and varied background, Adam Steltzner had many of the needed skills to lead the landing team for the Curiosity rover. That said, his team would struggle for almost a decade with design challenges and set backs. How did he keep the team focused and on task? What makes a team gel and enables truly innovative thinking? How do team dynamics drive that process forward or inhibit it? And how can organizational culture create an environment for sustained performance? The challenges he and the team faced and the lessons learned from those struggles can help audiences understand how to better lead their high performing teams, manage innovation and drive towards excellence.

Adam Steltzner, Team Leader & Chief Engineer EDL, NASA Mars Rover Curiosity & Author
A history-making Ph.D. rocket scientist, Adam Steltzner is recognized as one of NASA’s leading – and most unique – innovators. For nearly a decade, Adam led and inspired the breakthrough team that invented the ingenious “sky crane” landing system that so spectacularly landed the Mars rover, Curiosity on the Martian surface 300,000,000 miles from Earth in 2012. Next, Adam will lead NASA’s Mars 2020 Project that will gather core samples of Mars for scientific discovery.

Congratulations to the 2018 SMTA International Conference Award Winners
>>Rich Freiberger Best of Conference Presentation
The Role of Nickel in Solder Alloys - Part 2. The Effect of Ni on The Integrity of The Interfacial Intermetallic in Sn-Based Solder Joints to Copper Substrates
Kazuhiro Nogita, The University of Queensland

>>Best of Proceedings Paper
>1st Place: Alloy Composition and Thermal Fatigue of High Reliability Pb-Free Solder Alloys
*Richard Coyle, Ph. D., Nokia Bell Labs

>2nd Place: Dissolution Rate of Specific Elements in SAC305 Solder
*David Hillman, Collins Aerospace

>3rd Place: The Influence of Printed Circuit Board Thickness on the Thermal Fatigue of Quad Flat No-Lead Packages
*Richard Coyle, Ph.D., Nokia Bell Labs

>>Best Student Paper
Assessment of 2nd Level Interconnect Quality in Flip Chip Ball Grid Array (FCBGA) Package Using Laser Ultrasonic Inspection Technique
Vishnu Reddy, Georgia Tech


Tuesday September 24, 2019 8:00am - 10:00am CDT
Room 21

10:00am CDT

Electronics Exhibition
Many of the 170 exhibiting companies will bring working equipment that you can see for yourself.

Free Activities on the Show Floor:
>>John Deere Autonomous Lawn Mower | Booth 132
>>Jump Start - Free 101 Courses Tuesday, September 24 | Show Floor Theater
>>Poster Session Tuesday, September 24 @ 12pm
>>Career Center | SMTA Membership Booth
>>Meetings to Greetings Reception Wednesday, September 25 | Exhibit Hall Main Aisle @ 3:00pm

Tuesday September 24, 2019 10:00am - 5:00pm CDT
Expo Show Floor - Hall F

11:00am CDT

APT1: Advanced Packaging
Chair: Tim Jensen, Indium Corporation
Co-Chair: Ashok Pachamuthu, Maxim

>>High Performance RF Diplexer Module Using a Glass Interposer
*Charles Woychik, Ph.D., John Lauffer, Michael Gaige, William Wilson, James Carey and Matthew Neely, i3 Microsystems, Inc.; Scott Pollard, Corning Research & Development Corporation; Raj Parmar, Corning Precision Glass Solutions

>>Packaging Technologies for Advanced Automotive Applications
*Andrew Mawer, *Burton Carpenter, Ph.D., Mollie Benson, NXP Semiconductors

>>High Frequency Characteristics of Glass Interposer
Satoru Kuramochi, P.E., Masaya Tanaka, Miyuki Akazawa, Syohei Yamada, Dai Nippon Printing Co., Ltd.

Tuesday September 24, 2019 11:00am - 12:30pm CDT
Room 48

11:00am CDT

FSA1: Low Melting Alloys Mixing with SAC Alloys
Chair: Kunal Desai, Kester
Co-Chair: Olivia Chen, Qualcomm Technologies Inc.

>>Properties of Mixing SAC Solder Alloys with Bismuth-Containing Solder Alloys for a Low Reflow Temperature Process
Tayler Swanson, Rochester Institute of Technology

>>Evaluations on the Mixing of the Tin-Bismuth Paste with SnAgCu BGA Components in Terms of Peak Temperature, Time Over Melting and Paste Volume
*Jasbir Bath, *Shantanu Joshi, Roberto Segura, Koki Solder America

>>Root Cause and Solution to Mitigate the Hot Tear Defect Mode in Hybrid SAC-Low Temp Solder Joints
Todd Harris, Kevin Byrd, Nilesh Badwe, Intel Corporation

Tuesday September 24, 2019 11:00am - 12:30pm CDT
Room 49

11:00am CDT

MFX1: Cleaning Technologies
Chair: *David Raby, STI Electronics, Inc.
Co-Chair: *Tom Borkes, Jefferson Project

>>pH Neutral Cleaning Agents: Technology and Performance
Terry Price, Ph.D., ZESTRON Americas; Axel Vargas, Lockheed Martin

>>Electrochemical Corrosion Measurements on Metal Alloys Exposed to EAC Cleaning Agents
David Lober, *Mike Bixenman, MBA, DBA, KYZEN Corporation

>>IPC's New Cleanliness Testing Standard is Now Active. What's New? What Stays the Same?
*Mike Konrad, Aqueous Technologies

Tuesday September 24, 2019 11:00am - 12:30pm CDT
Room 44

11:00am CDT

SUB1: Surface Finishes
Chair: Mark Fulcher, Continental
Co-Chair: Mei-Ming Khaw, Keysight Technologies

>>IMC Study of Mid-Phosphorous and High-Phosphorous ENIG Finishes
Sandra Nelle, Thiago Pugliesi-Garcia, Britta Schafsteller, Gustavo Ramos, Atotech Deutschland GmbH

>>Wire Bonding Reliability of Electroless Ni/Pd/Au Plating Influence of Electroless Pd Deposition Reaction
*Yoshinori Ejiri, Ph.D., Takehisa Sakurai, Yoshinori Arayama, Yoshiaki Tsubomatsu, Kiyoshi Hasegawa, Hitachi Chemical Co., Ltd.

>>Reliable Novel Nickel-Free Surface Finish Solution for High-Frequency PCB Applications
Kunal Shah, Ph.D., Ariel McFalls, Sam Rhodes, LiloTree

Tuesday September 24, 2019 11:00am - 12:30pm CDT
Room 45

2:00pm CDT

APT2: Package Warpage Implications during Board Assembly
Chair:  *Raiyo Aspandiar, Ph.D., Intel Corproation
Co-Chair: Jagadeesh Radhakrishnan, Intel Corporation

>>Evaluation of Warpage Behavior of SMD-Packages and Boards During Soldering
Karsten Meier, Ph.D., Heinz Wohlrabe, Oliver Albrecht, Technische Universität Dresden; *Jörg Trodler, Dipl. -Ing,. Heraeus Electronics

>>Reliability of Electrical Devices due to Warpage Behavior of SMD-Packages and Boards during Soldering
*Jörg Trodler, Dipl. -Ing,. Heraeus Electronics; Karsten Meier, Ph.D., Heinz Wohlrabe, Oliver Albrecht, Technische Universität Dresden

>>High Temperature Component Warpage as a Function of Moisture Sensitivity (MSL) Rating
*Neil Hubble, Akrometrix LLC

Tuesday September 24, 2019 2:00pm - 3:30pm CDT
Room 48

2:00pm CDT

FSA2: Low Melting Alloy and Reliability
Chair: Mike Buetow, Circuits Assembly
Co-Chair: Nilesh Badwe, Ph.D., Intel Corporation

>>Optimising Solder Alloy Composition for Low Temperature Assembly
*Keith Sweatman, P.E., Tetsuro Nishimura, Tetsuya Akaiwa, Pavithiran Naraynanan, Nihon Superior Company, Ltd.

>>Gold (Au) Embrittlement of Plastic Quad Flat(pack) No-Lead (PQFN) Solder Joints and Mitigation Strategies
*Paul Vianco, Ph.D., T. Garcia, C.E. Jaramillo, B.M. McKenzie, and J. Reese, Sandia National Laboratories

>>New High Reliability Lead Free Solder Alloy for Electronic Application in Extreme Environment
Shawn Xiang, Md Hasnine, Ph.D., Xiang Wei, Ph.D., Kester Inc, An ITW Company

Tuesday September 24, 2019 2:00pm - 3:30pm CDT
Room 49

2:00pm CDT

MFX2: Reflow Challenges
Chair:
Co-Chair:*Chrys Shea, Shea Engineering Services

>>Vacuum Reflow Processing of Ball Grid Array Packages for Reduced Solder Joint Voiding and Improved Attachment Reliability
*Richard Coyle, Ph.D., Charmaine Johnson, Richard Popowich, Nokia Bell Labs; Tim Pearson, Dave Hillman, Collins Aerospace; Michael Meilunas, Universal Instruments; Fred Dimock, Bob Bouchard, BTU International; Richard Parker, iNEMI; Keith Howell, Nihon Superior Co., Ltd.; *Jörg Trodler, Dipl. -Ing,. Heraeus Electronics; Arvind Karthikeyan, Auburn University; Elizabeth Barr, Iowa State University

>>Effect of Vacuum Reflow on Solder Joint Voiding in Bumped Components
Arvind Srinivasan Karthikeyan, *Sa’d Hamasha, Ph.D., Auburn University; Michael Meilunas, Universal Instruments Corporation; Fred Dimock, BTU International, Inc.

Tuesday September 24, 2019 2:00pm - 3:30pm CDT
Room 44

2:00pm CDT

SUB2: Surface Finish Effects
Chair: *Lars Böttcher, Fraunhofer IZM Berlin
Co-Chair: *Mathias Nowottnick, University of Rostock

>>The Effects of Surface Finish on Solder Paste Performance - the Sequel
*Tony Lentz, Ph.D., FCT Assembly, Inc.

>>Component and Printed Wiring Board Finish Effects on QFN Solder Joint Formation
*Jeff Jennings, Ph.D., Harris Corporation

>>Advanced PCB Lamination Material Development for High-Speed Networking Application
James Kenny, Panasonic Corporation

Tuesday September 24, 2019 2:00pm - 3:30pm CDT
Room 45
 
Wednesday, September 25
 

7:00am CDT

Fun Run
CALLING ALL RUNNERS!
Get your run in.

You don't have to skip your run just because you are travelling. Join us for a 5 mile run on Wednesday, September 25 at 7:00 a.m. We will be meeting in the Doubletree lobby.

Wednesday September 25, 2019 7:00am - 8:00am CDT
Double Tree Lobby

8:00am CDT

APT3: Solder Joint Voiding
Chair: Andy Behr, Panasonic
Co-Chair: Michael Jansen, Raytheon Company

>>X-ray Micro-Computed Tomography Based FE Models to Capture Realistic Manufacturing Variability in Cu-Al Wirebonds and Solder-Joints in QFNs
*Pradeep Lall, Ph.D., Madhu Kasturi, Nakul Kothari, Auburn University; David Locker, US Army CCDC Aviation & Missile Center

>>Real Time X-Ray Analysis of Void Formation and Dynamics in QFN Devices During Reflow
Evstatin Krastev, Sandeep Kullar, Christopher Rand, Nordson Dage

>>Identifying Voids on BTC Assemblies with X-ray Analysis
*Bill Cardoso, Ph.D., Creative Electron, Inc.

>>New X-Ray Technologies for Enhanced Void Investigation
*Ragnar Vaga, YXLON International GmbH


Wednesday September 25, 2019 8:00am - 10:00am CDT
Room 48

8:00am CDT

FSA3: Flux Performances
Chair: *Jeff Jennings, Ph.D., Harris Corporation
Co-Chair: Fred Dimock, BTU

>>Fluxes Designed for Suppressing Non-Wet-Open at BGA Assembly
*Ning-Cheng Lee, Ph.D., Fengying Zhou, Fen Chen, Indium Corporation

>>Effect of No Clean Residue on Signal Integrity at High Frequency
Jennifer Nguyen, Flextronics

>>Novel Fluxes with Decreased Viscosity After Reflow for Flip Chip and SIP Assembly
*Ning-Cheng Lee, Ph.D., Runsheng Mao, Fen Chen, Indium Corporation

Wednesday September 25, 2019 8:00am - 10:00am CDT
Room 49

8:00am CDT

MFX3: Stencils & Printing
Chair: *Bill Capen, Honeywell
Co-Chair: Adam Murling, Indium Corporation

>>Comparison of Aperture Designs, Solder Pastes, Nanocoatings and Print/Inspection Systems
*Chrys Shea, Jennifer Fijalkowski, Shea Engineering Services; Raymond Whittier, BAE Systems; Michael Butler, Edward Nauss, ITWEAE/MPM; Dean Fiato, StenTech

>>Root Cause Stencil Design for SMT Component Thermal Lands
*Greg Smith, BlueRing Stencils; *Tony Lentz, FCT Assembly

>>Robustness of High Tension, Standard Tension and Mesh Mount Solder Paste Stencils
Prithvi Kotian, Plexus Corp.; Jeff Schake, ASM SMT Solutions; *Martin Anselm, Ph.D., Rochester Institute of Technology

>>Stencil Printing 008004/0201 Aperture Components
Edward Nauss, Michael Butler, ITW EAE

Wednesday September 25, 2019 8:00am - 10:00am CDT
Room 44

8:00am CDT

SUB3: Reliability
Chair: *Lars Böttcher, Fraunhofer IZM Berlin
Co-Chair: *Jörg Trodler, Dipl. -Ing,. Heraeus Electronics

>>Transient Solder Separation of BGA Solder Joint During Second Reflow Cycle Phase III – The Impact of Back Drill
Steven Perng, Ph.D., Weidong Xie, Cisco Systems, Inc.

>>Impact of Oil Immersion on Thermo-mechanical Properties of PCB’s, its layers and Reliability of BGA Packages
Shrinath Ramdas, A S M Raufur R Chowdhury, Akshay Lakshminarayana, Rabin Bhandari, Tushar Chauhan, Abel Misrak, Dereje Agonafer, Ph.D., The University of Texas at Arlington

>>Improved Printed Circuit Board Reliability Through Quantitative Control of Cleaning Processes
Elizabeth Kidd, Brooke Campbell, R. Giles Dillingham, Ph.D., BTG Labs

Wednesday September 25, 2019 8:00am - 10:00am CDT
Room 45

10:00am CDT

Wednesday Keynote Session

Wednesday, September 25 | 9:30am

FREE to All Attendees!

To the Moon! Orion’s Next Giant Leap into Deep Space
NASA’s Artemis program has a bold charter to land American astronauts, including the first woman and the next man, on the Moon by 2024. To achieve this feat, the Orion spacecraft has been designed, developed and tested by Lockheed Martin to gear up for our nation’s next giant leap into deep space. Dr. Mike Hawes, Lockheed Martin Vice President for Human Space Exploration and Orion Program Manager, will provide a behind-the-scenes look at Orion’s development and technology innovations that empower this next generation spacecraft to take astronauts to explore farther than humankind has ever ventured.

W. Michael Hawes, DSc, Vice President Human Space Exploration & Orion Program Manager
W. Michael Hawes, DSc, is the Vice President Human Space Exploration and Orion Program Manager for Lockheed Martin Space. Dr. Hawes joined Lockheed Martin in July 2011 after concluding a 33-year career with the National Aeronautics and Space Administration (NASA), and was selected to head up Lockheed Martin’s Orion Program Office in 2014.




Wednesday September 25, 2019 10:00am - 11:00am CDT
Room 21

11:00am CDT

APT4: Wafer Level Packaging
Chair: *Charles Woychik, Ph.D., i3 Microsystems, Inc.
Co-Chair: *Jim Wilcox, Universal Instrument

>>Solder Joint Reliability of BGA Packages on High Frequency Laminate PCBs Under Power Cycling
Akshay Lakshminarayana, Mahesh Pallapothu, Mugdha Chaudhari, Unique Rahangdale, Abel Misrak, Dereje Agonafer, Ph.D., University of Texas Arlington

>>High Density RDL Technologies for Panel Level Packaging of Embedded Dies
*Lars Böttcher, S. Kosmider, R. Kahle and A. Ostmann Fraunhofer IZM Berlin; F. Schein, Technical University of Berlin

>>Multi-axis Loading Effect on Edgebond and Edgefilled WLCSP Thermal Cycling Performance
*Tae-Kyu Lee, Ph.D., Andy Hsiao, Portland State University; Edward Ibe, Karl Loh, Zymet

Wednesday September 25, 2019 11:00am - 12:30pm CDT
Room 48

11:00am CDT

FSA4: Reliability Enhancement Through Bonding
Chair: Chad Showalter, Humiseal
Co-Chair:*Dock Brown, ANSYS

>>NImproved IC Package Reliability via Epoxy Flux Reinforcement
Shigeru Yamatsu, Atsushi Yamaguchi, Andy Behr, Koso Matsuno, Yasuhiro Suzuki, Panasonic Corporation

>>Novel Application Methods of Solder Joint Encapsulant Materials for SnAgCu FCBGA Solder Joints
Alex Huettis, Barath Palanisamy, and Raiyo Aspandiar, Ph.D., Intel Corporation

>>Synthesis and Properties of Several Functional Dimeric Epoxy Resins Containing Naphthalene Units
Mark Edwards, Kunihiro Morinaga, Koji Hayashi, Yoshiyuki Takahashi, Sun Chemical

Wednesday September 25, 2019 11:00am - 12:30pm CDT
Room 49

11:00am CDT

MFX4: MFX Assembly Challenges
Chair: *Chrys Shea, Shea Engineering Services
Co-Chair:*Ray Whittier, BAE Systems

>>Low Temperature Solder Paste Transfer Efficiency Characterization and Area Ratio Limits
Nilesh Badwe, Ph.D., Abhishek Prasad, Ph.D., Xiying Chen, and Kevin J Byrd, Intel Corporation

>>An Investigation Into the Development of Effective Printing Process for Package on Package (POP) Warpage and Head in Pillow Defect Reduction
Narayanan Manickam, MS, SMTC Corporation

>>Selective Solder Fine Pitch Components on High Thermal Mass Assembly
*Gerjan Diepstraten, Ing., Vitronics Soltec BV

Wednesday September 25, 2019 11:00am - 12:30pm CDT
Room 44

11:00am CDT

SUB4: Metallization
Chair: *Julie Silk, Keysight Technologies
Co-Chair: *Jasbir Bath, Koki Solder America

>>Periodic Pulse Plating of Mid-Aspect Ratio Printed Circuit Boards for Enhanced Productivity
Carmichael Gugliotti, Rich Bellemare, Andy Oh, Ron Blake, MacDermid Alpha Electronics Solution

>>New developed Copper Electroplating Process for BMV Filling with the Special Feature of a Very Bright Cu Deposition on Flex and Flex-Rigid PCB Applications
John Foley, Mustaf Özkök, Dipl. -Ing., Peter Haack, Ph.D., Vera Peldinski, Dipl.-Ing., Thomas Huelsmann Dipl-Ing., Ph.D., Grigory Vazhenin, Ph.D., Henning Hübner, Dipl.-Ing., Atotech Deutschland GmbH

>>Evaluation of Direct Metallization Technology Plating Properties with Excellent Material Selectivity
Takuya Komeda, P.E., Tetsuji Ishida, Hisamitsu Yamamoto, C. Uyemura & Co., Ltd.

Wednesday September 25, 2019 11:00am - 12:30pm CDT
Room 45

1:30pm CDT

APT5: Reliability I
Chair: *Roy Starks, Libra Industries
Co-Chair: *Reza Ghaffarian, Ph.D., NASA JPL

>>Effect of Cure Conditions on the Interface Properties and Reliability of Potted Electronics in 25,000g Mechanical Shock
*Pradeep Lall, Ph.D., Kalyan Dornala, Auburn University; Ryan Lowe, ARA Associates; John Deep, Air Force Research Laboratories

>>Solder Joint Integrity Evaluation of Bottom Terminated Component (BTC) Subjected to Thermal Cycling
Tim Pearson, Collins Aerospace

>>An Investigation on the Influence of Copper and Nickel Solderable Surfaces on Solder Joint Degradation due to Gold Embrittlement
Daphne Gates, Collins Aerospace

Wednesday September 25, 2019 1:30pm - 3:00pm CDT
Room 48

1:30pm CDT

MFX5: New and Unique Material Deposition
Chair: *Martin Anselm, Ph.D., Rochester Institute of Technology (RIT)
Co-Chair:*Srinivas Chada, Ph.D., Stryker

>>High Density Micro-Dispensing Solder and Adhesives onto FHE and 3D Substrate Assemblies
Sam LeBlanc, nScrypt, Inc.

>>Ultra-Fine Solder Paste Dispensing for Heterogeneous Integration
Kenneth Thum, P.E., Sze Pei Lim, Indium Corporation; KC Tai, NSW Automation Sdn Bhd

>>Aerosol Jet Direct Writing Polymer-Thick-Film Resistors for Printed Electronics
James Feng, Ph.D., Anthony Loveland, Michael J. Renn, Optomec

Wednesday September 25, 2019 1:30pm - 3:00pm CDT
Room 44

1:30pm CDT

SUB5: How It is Made
Chair: *Lenora Clark, MacDermid Alpha Electronics Solutions
Co-Chair: Carmichael Guggliotti, MacDermid Alpha Electronics Solutions


>>PCB Miniaturization: Lessons Learned and Best Practices
*Todd MacFadden, BOSE Corporation

>>For Optimal Performance of 77 GHz Radars, Material Properties and Fabrication Processing Needs to be Considered
*John Coonrod, Rogers Corporation

>>How Advanced Safety Systems Change Automotive PCB Design and Build
*Lenora Clark, MacDermid Alpha Electronics Solutions

Wednesday September 25, 2019 1:30pm - 3:00pm CDT
Room 45

3:00pm CDT

Meetings to Greetings Reception
Come help us recognize the companies who have supported the local SMTA events by bringing equipment, technology and knowledge to your engineers and operators across the globe. These companies' commitment and participation at the local level is what the SMTA is about. Celebrate with us on Wednesday, September 25 at 3:00 p.m. and enjoy complimentary beer, wine and appetizers on the show floor!

Wednesday September 25, 2019 3:00pm - 4:00pm CDT
Expo Show Floor - Hall F
 
Thursday, September 26
 

8:00am CDT

LF1: Lead-Free Reliability I
Chair:  *Andre Delhaise, Celestica
Co-Chair: *Lars Bruno M.Sc., Ericsson AB

>>Thermal Cycling Reliability and Failure Mode of Two Ball Grid Array Packages with High Reliability Pb-Free Solder Alloys
*Richard Coyle, Ph.D., Nokia Bell Labs

>>Attachment Quality and Thermal Fatigue Reliability of a Surface Mount Chip Resistor Assembled with a Low Temperature Solder
Charmaine Johnson, *Richard Coyle, Ph.D., Richard Popowich, Chen Xu, Nokia Bell Labs; *Martin Anselm, Ph.D., Ajitesh Singh Parihar, Tayler Swanson, Rochester Institute of Technology; *Lenora Clark, *Jason Fullerton, MacDermid Alpha Electronic Solutions

>>Bottom Terminated Component (BTC) Void Concerns: Real and Imagine
*David Hillman, Ross Wilcoxon, Tim Pearson, Kim Cho, Collins Aerospace

>>Status of Pb-free Risk Mitigation for Aerospace and Defense – “An Attitude Adjustment” Perspective
*Anthony Rafanelli, Ph.D., P.E., Raytheon Company

Thursday September 26, 2019 8:00am - 9:00am CDT
Room 49

8:00am CDT

TI1: Smart Factory
Chair: Trevor Galbraith, Global SMT & Packaging
Co-Chair: *Matt Kelly, P.Eng, MBA, IBM Corporation

>>Human Automation: Hands-Free Industry 4.0
*Michael Ford, Aegis Industrial Software

>>Designing a Robust Industrial Augmented Reality Solution
*Jay Gorajia, Nir Sagi, Eran Nadel, Siemens PLM; Shai Newman, Compedia

>>Automating Detection of Pick & Place Nozzle Anomalies
*Greg Vance, Rockwell Automation

>>A Defect Prediction Case Study for Printed Circuit Board Assemblies Containing Ball Grid Array Package Types
Phillip M. LaCasse, LTC, Ph.D., Air Force Institute of Technology; Wilkistar Otieno, Ph.D., University of Wisconsin - Milwaukee; *Greg Vance, Francisco P. Maturana, Ph.D., Mikica Cvijetinovic, Rockwell Automation

Thursday September 26, 2019 8:00am - 9:00am CDT
Room 45

8:00am CDT

APT6:Thermal
Chair: *Pradeep Lall, Ph.D., Auburn University
Co-Chair: *Marc Benowitz, iNEMI

>>High-reliability Lead-free Solder for Low-cost Die Attach Applications
*Ranjit Pandher, Ph.D., Niveditha Nagarajan, Sathish Kumar, Gyan Dutt, Carl Bilgrien, MacDermid Alpha Electronics Solution

>>Mechanical Failure of Thermal Interface Materials Due to Thermal Aging and Impact on Performance of Electronic Package
Tushar Chauhan, ASM Raufur Chowdhury, Abel Misrak, Rabin Bhandari, Pavan Rajmane, Krishna Bhavana Sivaraju, Milad Abdulhasansari, Dereje Agonafer, The University of Texas at Arlington

>>Modification and Application of Organic Phase Change Materials for Thermal Peak Management
*Mathias Nowottnick, Ph.D., Jacob Maxa, Andrej Novikov, University of Rostock

Thursday September 26, 2019 8:00am - 10:00am CDT
Room 48

8:00am CDT

MFX6: Conformal Coating
Chair: *Rakesh Kumar, Specialty Coating Systems, Inc.
Co-Chair: *David Reitz, Inventec Performance Chemicals

>>Process Development Challenges and Design of Experiments for Conformal Coating Printed Circuit Board Assemblies
Roshan Muralidharan, WISE Binghamton University; Rajat Dhiman, SMART Modular Technologies

>>LED Curable Conformal Coatings with High Proptective Properties
Chris Brightwell, Danielle Bradley, Humiseal Europe

>>Optimizing Conformal Coating Coverage For Improved Environmental Corrosion Protection
*Chen Xu, Ph.D., Nokia Bell Labs

>>Atmospheric Plasma Treatment Prior to Selective Conformal Coating
Brian Stumm, Anda Technologies USA Inc.

Thursday September 26, 2019 8:00am - 10:00am CDT
TBA

10:30am CDT

APT7: Reliablity II
Chair: *Brian Roggeman, Qualcomm Technologies Inc.
Co-Chair: Arvind Srinivasan Karthikeyan, Auburn University

>>Investigating BTC Design Parameters for Robust Electrochemical Reliability on a Printed Circuit Board
*Mark McMeen, *Mike Bixenman, MBA, DBA, Magnalytix, LLC

>>Reliability Assessment of BGA Solder Joints - Megtron 6 VS FR4 Printed Circuit Boards
ASM Raufur Chowdhury, The University of Texas at Arlington

>>Automotive Pb-Free BGA Packages Solder-Joint Reliability
*Burton Carpenter, *Andrew Mawer, Mollie Benson, John Arthur, Betty Yeung, NXP Semiconductors

Thursday September 26, 2019 10:30am - 12:00pm CDT
Room 48

10:30am CDT

MFX7: Cleaning Challenges

Chair: *Jason Keeping, P. Eng., Celestica, Inc.
Co-Chair: *Sal Sparacino, ZESTRON USA

>>Characterize and Understand Functional Performance of Cleaning QFN Packages on PCB Assemblies – iNEMI Cleanliness Research Study
*Mike Bixenman, MBA, DBA, KYZEN Corporation

>>Handling Technical Cleanliness in electronic Production
Michael Kövi, *Helmut Schweigart, Ph.D., ZESTRON Corporation

>>Risk Management of Class 3 Electronics as a Function of Cleanliness
*William Capen, Jason Edgar, Honeywell FM&T; *Mark McMeen, *Mike Bixenman, MBA, DBA, Magnalytix LLC

Thursday September 26, 2019 10:30am - 12:00pm CDT
Room 44

10:30am CDT

LF2: Microstructure, Structure, Properties
Chair: *Keith Sweatman, P.E., Nihon Superior Company, Ltd.
Co-Chair: Tim Pearson, Collins Aerospace

>>Precipitation of Bi and SbSn Phases in Next-Generation Pb-Free Solders
Chris Gourlay, Ph.D., S.A. Belyakov, Imperial College London; K. Sweatman, T. Akaiwa, T. Nishimura, Nihon Superior Co., Ltd

>>Phase formation and Solid Solubility in High Reliability Pb-Free Solders Containing Bi, Sb or In
Chris Gourlay, Ph.D., S.A. Belyakov, Imperial College London; B. Arfaei, Ford Motor Company;
C. Johnson, R. Coyle, Nokia Bell Labs; K. Howell, Nihon Superior Co., Ltd

>>Gold Embrittlement Effects on Bulk Mechanical Properties of SAC396
Rebecca Wheeling, Sandia National Laboratories

Thursday September 26, 2019 10:30am - 12:00pm CDT
Room 49

10:30am CDT

TI2: Digital Strategy for Electronics Manufacturing
Chair: *Marie Cole, IBM Corporation
Co-Chair: *Greg Vance, Rockwell Automation

>>Electronics Production Planning - What You Need to do to Remain Competitive
*Jay Gorajia, Siemens PLM

>>The Secure Supply-Chain: 2019 Update
*Michael Ford, Aegis Industrial Software

>>Real Stories of Applied Advanced Analytics in the Electronics Manufacturing Smart Factory
Jack France, Keysight Technologies Ltd.

Thursday September 26, 2019 10:30am - 12:00pm CDT
Room 45

1:00pm CDT

LF3:Low Temperature Solder
Chair: *Srinivas Chada, Ph.D., Stryker
Co-Chair: *Julie Silk, Keysight Technologies

>>Tin-Bismuth Low Temperature Homogeneous Second Level Interconnect Solder Joint Microstructure, Reliability, and Failure Mechanism
Nilesh Badwe, Ph.D., Kevin Byrd, Ou Jin, Pubudu Goonetilleke, Intel Corporation

>>iNEMI Project on Process Development of Bisn-based Low Temperature Solder Pastes - Part Vi: Mechanical Shock Results on Resin Reinforced Mixed Snagcu-bisn Solder Joints of Fcbga Components
Jagadeesh Radhakrishnan, Intel Corporation; et al.

>>High Reliability Low Temperature Solder Alloys
*Anna Lifton, Pritha Choudhury, Ph.D., *Morgana Ribas, Ph.D., Raghu Raj Rangaraju, Siuli Sarkar, Ph.D., MacDermid Alpha Electronics Solutions

Thursday September 26, 2019 1:00pm - 2:30pm CDT
Room 49

1:00pm CDT

TI3: Additive Manufacturing in Electronics Panel
Chair: *Gary Tanel, Libra Industries
Co-Chair: *Jason Fullerton, MacDermid Alpha Assembly Solutions
Moderator: *Trevor Galbraith, Global SMT & Packaging

Panelists:
Daniel Braga, Accucode 3-D
*Pradeep Lall, Ph.D., Auburn University
Ofer Maltiel, Nano-Di
Kevin Smith, MarkForged

Thursday September 26, 2019 1:00pm - 2:30pm CDT
Room 45

2:45pm CDT

LF4: Lead-Free Reliability II
Chair: Rebecca Wheeling, Ph.D., Sandia National Laboratories      
Co-Chair: Charmaine Johnson, Nokia Bell Labs

>>Assessment of the Behavior of High Reliability Solder Alloys in Accelerated Thermal Testing
*Jim Wilcox, Universal Instruments

>>Study Electromigration in SnBiAg / SAC(305) Mixed Solder Alloy
Faramarz Hadian, Binghamton University

>>Reliability of the Solder Joints: Is a Shear Force a Good Indicator
*Anna Lifton, Westin Bent, Irina Lazovskaya, Paul Salerno, Frank Andres,MacDermid Alpha Electronics Solutions

Thursday September 26, 2019 2:45pm - 3:00pm CDT
Room 49
 
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